Your new company

Join our client to develop smart, energy-efficient sensor ICs that make everyday products smarter.

Your new role

• Define verification strategy as per system requirements. Support test bench architecture, verification plan, and interact with design teams for feature extraction.
• Perform analog/real-number behavioral modelling and validation.
• Integrate analog models in UVM-based digital/analog mixed-signal testbench.
• Perform execution of verification plans, including AMS top-level self-checking verification.
• Support technical communication with customers and participate in design reviews; ensure schedule adherence and interactive problem-solving.

What you'll need to succeed

• Master’s or Bachelor’s degree in Electrical Engineering with emphasis in Design Verification or a similar speciality, as well as at least 10 years of proven industry experience.
• Expertise in block- and system-level verification with reusable components, testbench architecture and verification planning.
• Experience with analog behavioral modelling with System Verilog RNM and Verilog-AMS.
• Experience with analog checkers; knowledge of SVA is a plus
• Experience with relevant EDA tools and familiarity with scripting languages (e.g. Python, Tcl, SKILL).
• Fluent in English. Excellent team player; calm professional demeanor and excellent listening skills, ability to organise and prioritise work.

What you need to do now

If you're interested in this role, click 'apply now' to forward an up-to-date copy of your CV, or call us now.

If this job isn't quite right for you, but you are looking for a new position, please contact us for a confidential discussion on your career.